EPA240D-100P updated 11/14/2005 high efficiency heterojunction power fet specifications are subjec t to change without notice. excelics semiconductor, inc. 310 de guigne drive, sunnyvale, ca 94085 page 1 of 1 phone: 408-737-1711 fax: 408-737-1868 web: www.excelics.com revised november 2005 ? non-hermetic 100mil metal flange package ? +33 dbm typical output power ? 20 db typical power gain at 2ghz ? 0.4 x 2400 micron recessed ?mushroom? gate ? si 3 n 4 passivation ? advanced epitaxia l heterojunction profile provides extra high power efficiency, and high reliability electrical characteristics (t a = 25 o c) symbols parameters/test cond itions min typ max unit 31.0 33.0 p 1db output power at 1db compression f= 2ghz vds=8v, ids=50% idss f= 4ghz 33.0 dbm 18.5 20.0 g 1db gain at 1db compression f= 2ghz vds=8v, ids=50% idss f= 4ghz 14.5 db pae power added efficiency at 1db compression vds=8 v, ids=50% idss f=2ghz 55 % idss saturated drain current vds=3v, vgs=0v 440 720 940 ma gm transconductance vds=3v, vgs=0v 480 760 ms vp pinch-off voltage vds=3v, ids=6ma -1.0 -2.5 v bvgd drain breakdown voltage igd=2.4ma -11 -15 v bvgs source breakdown voltage igs=2.4ma -7 -14 v rth thermal resistance (au-sn eutectic attach) 26* o c/w * overall rth depends on case mounting. absolute maximum rating 1,2 symbols parameters absolute 1 continuous 2 vds drain-source voltage 12v 8v vgs gate-source voltage -8v -3v ids drain current idss 620ma igsf forward gate current 120ma 20ma pin input power 30 dbm @ 3db compression tch channel temperature 175 o c 150 o c tstg storage temperature -65 to +175 o c -65 to +150 o c pt total power dissipation 6.0w 5.0w note: 1. exceeding any of the above ratings may result in permanent damage. 2. exceeding any of the above ratings may reduce mttf below design goals. g d
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